- 31 Mar, 2021 1 commit
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Silviu Baranga authored
Unlike Thumb, Morello uses the LSB as part of the relocation computation, and we shouldn't set the LSB on the symbol difference result. Function size computation now needs to use a local label to avoid subtracting 1 due to the LSB on the STT_FUNC symbol.
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- 30 Mar, 2021 1 commit
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Jessica Clarke authored
This ensures Morello gets the various bug fixes and improvements made to the normal CHERI getTargetSize since it made its own copy. As part of this, fix the hacky handling of symbol sizes added for Morello as follows. getSize only respected the isSectionStartSymbol field for CheriABI, but hybrid Morello binaries can have capabilities too, so add a new boolean parameter for CheriCapRelocsSection to use in order to force it to be honoured. Linker scripts were also not setting isSectionStartSymbol for things that looked like section start symbols, so getSize would never use the section's bounds for them. Because of these two issues, getMorelloTargetSize overrode a value of 0 for symbols that had a name that looked like a section start symbol rather than taking into account the additional restrictions from Writer on whether a symbol is a section start symbol. By ensuring the symbol information is right in the first place this hack is no longer needed. Note: isSectionStartSymbol is both a field in Defined that encompasses all the checks, and a function that just matches the name. The former is the property that should be used to decide whether to use the section size, and the latter is used both as part of determining the value for that field and for suppressing warnings about zero-length capabilities (as would otherwise seen for empty sections). This fixes the following assertion previously triggered by the new test (copied from the existing CHERI capreloc-aether test): Assertion failed: (OffsetInOS <= OS->size), function getMorelloTargetSize, file lld/ELF/Arch/Cheri.cpp, line 739.
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- 29 Mar, 2021 1 commit
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Silviu Baranga authored
scalarizing vectors of capabilities.
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- 26 Mar, 2021 2 commits
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Diana Picus authored
There are many places where the frame pointer is hardcoded to x29 for AArch64 (and respectively to c29 in a capability context). This includes both internal variable/enum names and user-visible strings (e.g. "x29" is considered an alternative name for "fp" rather than the other way around). This patch removes fp and cfp from all the register number enums and from register infos and explicitly defines and uses x29/c29 instead in the code. We preserve the behaviour that the name of the frame pointer is "fp"/"cfp" rather than "xN" or "cN". Note that since we no longer know the frame pointer statically, we need to update the register infos with frame pointer information dynamically. For this purpose, a helper function is added that will mark one of the registers as the frame pointer or capability frame pointer. We call this in every file that makes use of the register infos directly, usually in some constructor or initialization function. One additional change is necessary in GDBRemoteRegisterContext.cpp - this file was including RegisterInfos_arm64.h inside a function, which made it impossible to define the helper. We therefore had to move things one scope up. This isn't a nice way to refactor this code, but I think it's the best way to minimize merge pains in the future.
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Diana Picus authored
Switch triple from 'aarch64-none-elf' to 'aarch64-linux-android', since that is our main target at the moment. The behaviour is subtly different, so we need to update a test because the CFA now remains relative to the SP even when the FP changes.
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- 25 Mar, 2021 3 commits
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Jessica Clarke authored
Darwin's ABI prepends an additional underscore to every C/C++ identifier and llvm-cxxfilt by default will remove this. Thus ensure the underscore doesn't get stripped in this test so that the symbols are properly demangled regardless of the OS.
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Jessica Clarke authored
The latter is only supported in csh and zsh, but not bash.
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Silviu Baranga authored
a triple.
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- 15 Mar, 2021 1 commit
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Silviu Baranga authored
based on the IP. This also fixes issues in LocalProgramCounter when the pointer is not sealed.
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- 10 Mar, 2021 1 commit
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Silviu Baranga authored
without symbols. These are executable capabilities, so their size won't depend on the symbol size anyway.
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- 08 Mar, 2021 7 commits
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Silviu Baranga authored
1. DSO-internal function addresses are generated from PCC and sealed. This avoids a load instruction and should slightly reduce the number of relocations required. 2. Capability stubs for internal objects are merged into a table to allow relative addressing. This allows sharing the adrp instruction between multiple uses of the capability table. The downside to this is that it can increase register pressure. 3. We perform a post-legalization combine to push constant pointer adds into adrp (this can remove add instructions). This usually happens pre-legalization, but re-using that machinery would require either changes to the SelectionDAG builder or doing the load from the capability table in IR (which would affect some other SelectionDAG transforms).
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Silviu Baranga authored
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Silviu Baranga authored
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Ryan Prichard authored
- For CIE version 1 (e.g. in DWARF 2.0.0), the return_address_register field is a ubyte [0..255]. - For CIE version 3 (e.g. in DWARF 3), the field is instead a ULEB128 constant. Previously, libunwind accepted a CIE version of 1 or 3, but always parsed the field as ULEB128. Clang always outputs CIE version 1 into .eh_frame. (It can output CIE version 3 or 4, but only into .debug_frame.) Differential Revision: https://reviews.llvm.org/D83741
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Silviu Baranga authored
__eh_frame_start __eh_frame_end __eh_frame_hdr_start __eh_frame_hdr_end These symbols are used by libunwind for baremetal to get the start and end of the .eh_frame and .eh_frame_hdr sections. Make sure these are not affected by any further section padding done by --morello-c64-plt.
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Silviu Baranga authored
format
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Jessica Clarke authored
We need to forbid the pointer mode for integers in pure-capability C, only permitting it on actual pointer types (which makes it rather redundant, but we can support it so might as well appease those who still think this attribute is a good idea) and preserving the fact that it's a pointer rather than creating a 64-bit/128-bit plain integer. We also need to do the same for unwind_word (which is a particularly bad concept for split register files and for hard float ABIs). For completeness, add a capability mode to complement the pointer mode. Conversely, forbid integer modes for capabilities, and thus pointers in pure-capability C, in order to avoid loss of provenance; if a plain integer is desired, the code should be modified to use one, not a pointer type. Whilst here, make the implementation of getRegisterWidth clearer. Currently PointerWidth is left as the address width for pure-capability code which is confusing and should one day be fixed, likely by introducing a separate PointerRange/AddressWidth. Outside of X86 (which overrides this anyway), this is used solely for the word mode, and that is likely intended to be a plain integer, not a capability, although given that X86 makes it an AVX type perhaps we should make it a capability if the intent is to use it for memcpy. This at least preserves the current behaviour and can be revisited later.
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- 05 Mar, 2021 1 commit
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Diana Picus authored
Some of the tests that we added or touched weren't included in check-lldb or any other build target after 99451b44. This commit moves them in the appropriate new place.
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- 02 Mar, 2021 2 commits
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Diana Picus authored
Add support for end-to-end lldb tests on an FVP model running Android. The tests live in lldb/morello-android-tests and can be run independently of the llvm build system. Each test has its own subdirectory containing: * source files, * an Android.bp describing how to build the target for the test, and * a ${TESTNAME}.test file containing lldb commands and FileCheck expectations. Note that we do not use RUN lines to drive the setup of the tests. Instead, all the tests are expected to have the same setup, consisting of the following steps: 1. Compiling the target executable 2. Uploading it to the model (with adb) 3. Starting lldb-server on the model 4. Starting lldb on the host, in batch mode, and checking its output For more details check out the README. This patch adds a single test to serve as an example.
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Silviu Baranga authored
in the pure capability ABI.
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- 28 Feb, 2021 1 commit
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Brett Gutstein authored
We previously didn't have a case statement for this.
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- 22 Feb, 2021 1 commit
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Silviu Baranga authored
unsupported with clang-7
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- 19 Feb, 2021 2 commits
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Silviu Baranga authored
because pc + offset is aligned down.
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Silviu Baranga authored
We don't have fenv.h and we can't run echo in a baremetal environment.
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- 11 Feb, 2021 1 commit
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Alex Richardson authored
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- 10 Feb, 2021 1 commit
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Diana Picus authored
Enable lldb shell tests to use a different python than the system one (/usr/bin/python3). This makes it possible for us to point lldb to the python it was compiled with, by setting the value of PYTHONHOME in the environment when running the tests.
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- 05 Feb, 2021 1 commit
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Diana Picus authored
This partially reverts commit 8fdf909c.
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- 02 Feb, 2021 12 commits
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Alex Richardson authored
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Alex Richardson authored
This was no longer being added after a7e15b06
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Alex Richardson authored
The "frame recognizer" command depends on LLDB_ENABLE_PYTHON.
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Alex Richardson authored
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Alex Richardson authored
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Alex Richardson authored
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Alex Richardson authored
It now prints the target address instead of a relative offset. See commit 7f36cb1f and aa708763
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Alex Richardson authored
It now prints the target address instead of a relative offset. See commit 7f36cb1f and aa708763
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Alex Richardson authored
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Alex Richardson authored
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Alex Richardson authored
This change is no longer required after the latest upstream CHERI-LLVM merge. This reverts commit bd1c75c7.
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Alex Richardson authored
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- 25 Jan, 2021 1 commit
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Amilendra Kodithuwakku authored
The change for https://reviews.llvm.org/D90897 tests FirstSec/LastSec, that was added in https://reviews.llvm.org/D90458, instead of Sections list. Cherry-picking https://reviews.llvm.org/D90458 is non-trivial at this point, so temporarily use Sections list in the test. Revert after D90458 is merged. Change-Id: Iad97ca3b76a4f6561823f4d9141f30e31e85ff68
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