GitLab

inefficient memops.

They can now be turned off by passing -warn-cheri-inefficient=false.
This still warns by default.

Otherwise, if we're performing arithmetic on a pointer via &...[] that's
inside a nested container, we will end up looking at the container's
size and using that for the bounds of the pointer loaded from the
container, which makes no sense. Similarly, subscripting itself
shouldn't look at any of the attributes on the field when it's a
pointer.

This reverts commit 6423e29a.

The executable capabilities created by dynamic relocations used the
symbol value for the base, and the symbol size as the capability limit.
This results in the executable capabilities being too narrow that they
could not call other functions.

Fix this by encoding dynamically relocated executable capabilities in a way
similar to how the cap relocs for executable capabilities are encoded in the
static linking case; i.e. set the bounds to cover the .text + .ro + .rel.ro regions.

When using a datalayout that has pointer index width != pointer size this
code triggers an assertion in Value::stripAndAccumulateConstantOffsets().
I encountered this this while compiling FreeBSD for CHERI-RISC-V.
Also update LoadsTest.cpp to use a DataLayout with index width != pointer
width to ensure this case is tested.

Differential Revision: https://reviews.llvm.org/D110406

We should be using the index type not the size of the pointer. This makes
a difference for architectures such as CHERI where pointers have additional
metadata bits that are not part of the address.
I also noticed that CallPromotion was not working for CHERI purecap. This
is most likely caused by us changing the representation of member function
pointers and not having updated the internals to handle that.

This started failing in our CI and judging by the number of skip lines
there's probably something wrong with it upstream too. Skip for now.

Set the frame pointer to x17 and c17 for the descriptor ABI. At the
moment, we don't have support for identifying that an application has
been compiled with the descriptor ABI, so instead we do something a bit
hacky: add a new target feature. This can be enabled on the command line
with:

settings set target.aarch64-morello-desc-abi true

It needs to be called *before* launching the process, otherwise it
won't take effect. It also doesn't affect certain parts of the Python
API, as used in TestCapabilityOperation.py, and probably in other
scenarios too. We can fix these when Android supports building
descriptor ABI apps, so we can actually test something.

Needs more testing.

The tests are currently broken because lldb needs to be able to find
the source files in order to set breakpoints. The debug information uses
paths relative to the Android source tree. But since we have made it
possible to run the tests independently of an Android source tree, and
we no longer 'cd' to it in each test, lldb gets understandably lost.

This patch fixes the issue by adding an ORIGINAL_SOURCE_PREFIX variable,
which is used by the test runner to add a source mapping from the
original source locations (i.e. those relative to the Android source
tree) to the current source locations (i.e. relative to the test runner
itself).

We just need the out directory of the Android build
and not the complete source to run the lldb tests.
Signed-off-by: Vishal Bhoj <vishal.bhoj@linaro.org>

Remove 'adb connect', since it's no longer needed and just prints
errors. This also means we no longer need the ADB_PORT environment
variable, yay!

Also update the README to mention a potential workaround for "failed to
get reply to handshake packet" errors.

for alternate base loads/stores.

-disable-warn-morello-abi-mismatch.

The CHERI simplified format says we should only print the address for
null-derived capabilities (i.e. capabilities for which the tag and top
word are all zero).

Add end-to-end tests checking capability faults. Based on code samples
from Luis Machado :)

Update the end-to-end tests to work with the new default capability
dumping format.

Test reading arrays of capabilities.

lldb.sh sets the correct PYTHONHOME variable.

The PCC register was defined using a DEFINE_CAP_PCC macro, which
differed from the DEFINE_CAP macro used for most other capability
registers only in terms of the register kinds. In the case of
DEFINE_CAP_PCC, these were defined via LLDB_KIND, which set everything
to LLDB_INVALID_REGNUM (completely ignoring the generic_kind parameter).

This patch fixes the issue by using DEFINE_CAP, which correctly sets up
the expected register kinds for PCC.

Fixing the generic register kind for PCC exposes another issue in
ABISysV_arm64::GetFrameState. The logic there was that if the register
context does not have a PCC, then we don't have capabilities and the
frame state is eFrameStateSimple. If the register context does have
a PCC but we fail to read it, that would be an error and we should
return false. The problem is that when reading a plain AArch64 core
file, we will not be able to read PCC from it - however the register
context would still contain a PCC register in that case, because we
always add the capability registers to non-dynamic AArch64 register
contexts. Therefore, instead of erroring out, we make the same
assumption as before - that the frame state is simple and we're not
supposed to use capabilities.

We need both the signed offset and extended register offset
patterns, since the addressing mode matching code expects this
(otherwise we can end up with a crash because nothing gets
selected).

Expressions such as foo + bar - foo are not parsable,
we need brackets around bar - foo.

This has exposed a few issues that I've reported as
#33
#34
#35

I have not yet verified that the output is correct for all tests, so it
would be good to do this as part of the review process.

This was breaking the MIR test llvm/test/CodeGen/CHERI-Generic/Inputs/hoist-alloca.ll
as it could not find the matching alloca instruction for '<unnamed alloca>'.

Longer-term this pass should be merged with CheriBoundAllocas since they
both provide the same functionality. See
#36

assembly.

This warning was suppressed for unlabeled capinits in a .data.rel.ro section.
However clang can emit such capinits for .data.rel.ro..L__cap_merged_table
sections as well. So suppress the warning for .data.rel.ro* sections too.

TBD: This warning does not seem right as the label of the capinit should not
have any bearing on the linking process. Proper fix TBD.

does not crash.

llvm.smul.with.overflow in purecap.

attribute. The attribute will instead be transfered from the
original instruction.

The purpose of these relocations is to detect interworking.
LLD doesn't have the required infrastructure though, so they
are treated the same as R_AARCH64_CONDBR19 and R_AARCH64_TSTBR14