- 25 May, 2022 5 commits
-
-
Oliver Swede authored
This assumes the removal of static function dispatch in bionic for arm64. Change-Id: Ia421334a511d49de0359db70ff56b5cb1210d7af
-
Oliver Swede authored
Change-Id: Idc7909ace54082314a3a97a246c42d0ca7f4cebc
-
Oliver Swede authored
Change-Id: Ice7afeb81811476e9c7f267a590cd807e2f3c598
-
Modifications to resolve some conflicts around symbol declaration styling and modifications to absent file (string/bench/memcpy.c), and remove unnecessary ILP32 support. Original commit message: "This is bassed on the aarch64 memcpy, with an added path for copying capabilities when dst - src == 0 mod 16. This uses neon registers when not copying capabilities." Author of the original commit: Silviu Baranga <silviu.baranga@arm.com> Change-Id: I423adcd411866b9fac6c706b3101a3efb0a656a5
-
Modifications to resolve some conflicts around symbol declaration styling, and remove unnecessary ILP32 support. Original commit message: "Based on the aarch64 memset." Author of the original commit: Silviu Baranga <silviu.baranga@arm.com> Change-Id: I2b82a67f767737ced315bfb002db6988d90f0291
-
- 17 May, 2022 1 commit
-
-
Modifications to resolve some conflicts around symbol declaration styling and missing files. Original commit message: "Add the boileplate changes needed to build the strings routines with the morello arch." Author of the original commit: Silviu Baranga <silviu.baranga@arm.com> Change-Id: I82f3979dbcf86dec5c772548f40f28aeaaafcbf5
-
- 11 Apr, 2022 1 commit
-
-
Oliver Swede authored
Change-Id: Ic3c0e4618b9f43d31a4c8ec9972e24e353c39919
-
- 25 Feb, 2020 5 commits
-
-
Peter Collingbourne authored
Bug: 135772972 Change-Id: Ic8a15b07a19488f0fa66aa8548583591a8174917
-
Peter Collingbourne authored
Change-Id: If4c919657f8983d251906a2f0567d78dbf583c6f
-
Reading outside the range of the string is only allowed within 16 byte aligned granules when MTE is enabled. This implementation is based on string/aarch64/strchr.S The 64-bit syndrome value is changed to contain only 16 bytes of data. The 32 byte loop is unrolled by two 16 byte reads.
-
Add support for stpcpy on AArch64.
-
Remove unnecessary code for unused ZVA sizes. For zero memsets it's faster use DC ZVA for >= 160 bytes. Add a define which allows skipping the ZVA size test when the ZVA size is known to be 64 - reading dczid_el0 may be expensive.
-
- 18 Feb, 2020 2 commits
-
-
Reading outside the range of the string is only allowed within 16 byte aligned granules when MTE is enabled. This implementation is based on string/aarch64/strlen.S Merged the page cross code into the main path and optimized it. Modified the zeroones mask to ignore the bytes that are loaded but are not part of the string. Made a special case for when there is 8 bytes or less to check before the alignment boundary.
-
Szabolcs Nagy authored
Including multiple asm source files into a single top level file can cause problems, this can be fixed by having one top level file per target specific source file, but for maintenance and clarity it's better to use the sub directory structure for selecting which files to build. This requires a new ARCH make variable setting in config.mk which must be consistent with the target of CC. Note: the __ARM_FEATURE_SVE checks are moved into the SVE asm code. This is not entirely right: the feature test macro is for ACLE, not asm support, but this patch is not supposed to change the produced binaries and some toolchains (e.g. older clang) does not support SVE instructions. The intention is to remove these checks eventually and always build all asm code and only support new toolchains (the test code will only test the SVE variants if there is target support for it though).
-
- 12 Feb, 2020 1 commit
-
-
Further optimize integer memcpy. Small cases now include copies up to 32 bytes. 64-128 byte copies are split into two cases to improve performance of 64-96 byte copies. Comments have been rewritten. Improves glibc's memcpy-random benchmark by ~10% on Neoverse N1.
-
- 02 Feb, 2020 3 commits
-
-
Automerger Merge Worker authored
Upgrade arm-optimized-routines to 33ba1908 am: 3cfe7229 am: b7d60964 am: ebae74c3 Change-Id: I426a462824ae79ef6aea3fefe4ebb74ae9123f48
-
Automerger Merge Worker authored
Upgrade arm-optimized-routines to 33ba1908 am: 3cfe7229 am: b7d60964 Change-Id: Ic19a77e480800bf09ee9799f98fc0571062e604f
-
Automerger Merge Worker authored
Change-Id: I2362a7aec7beb59a0667b8389395dc6136b0915d
-
- 01 Feb, 2020 1 commit
-
-
Haibo Huang authored
Test: None Change-Id: I0a8e0dfe452bef99b9225811e6f5049cf722f3d7
-
- 25 Jan, 2020 3 commits
-
-
Automerger Merge Worker authored
Change-Id: I82501ab9be09ea4cbd04eaaf9d80e76a370f0125
-
Automerger Merge Worker authored
Change-Id: If5e92205e1a9eb3f47f33393d25b6cb67315de87
-
Yifan Hong authored
am: 212cd846 Change-Id: I14665401f88e2eefe676d4ebdb8ad715f1b1648e
-
- 22 Jan, 2020 1 commit
-
-
Yifan Hong authored
Test: pass Bug: 147347110 Change-Id: Id538a1f7c66af23c35bf4935ba5385b63378e3dd
-
- 16 Jan, 2020 2 commits
-
-
Automerger Merge Worker authored
[automerger skipped] DO NOT MERGE - Empty merge qt-qpr1-dev-plus-aosp-without-vendor (6129114) into stage-aosp-master am: ad4a09b2 am: 5d368981 -s ours am skip reason: subject contains skip directive Change-Id: Iecdcfc12d6d4a9d446ed87be959e3abb61eaf22a
-
Automerger Merge Worker authored
DO NOT MERGE - Empty merge qt-qpr1-dev-plus-aosp-without-vendor (6129114) into stage-aosp-master am: ad4a09b2 Change-Id: Ia39cb8f53a273990b1bf13d6d5e735c94ef41594
-
- 15 Jan, 2020 1 commit
-
-
Xin Li authored
Bug: 146167222 Change-Id: Idf9ffd84968f5788774541e6b6953d66671c472a
-
- 14 Jan, 2020 3 commits
-
-
Szabolcs Nagy authored
Some functions were not tested with the statistical ulp error check tool, this commit adds tests for the current math symbols.
-
Szabolcs Nagy authored
This implementation is a wrapper around the scalar pow with appropriate call abi. As such it is not expected to be faster than scalar calls, the new double prec vector pow symbols are provided for completeness.
-
This was a placeholder for testing the build system before we added optimized string code and thus no longer needed.
-
- 13 Jan, 2020 4 commits
-
-
Automerger Merge Worker authored
Change-Id: Ib4f306b6ff014fcee17ef4efbc4afc43f36f9067
-
Automerger Merge Worker authored
Change-Id: I84cf954aa2b1482b33f79ed7a422242063bc589a
-
Elliott Hughes authored
am: 9ba6fed2 Change-Id: I53b3b8c36c6b3f455abd5c02f2f27a038816201a
-
Elliott Hughes authored
Change-Id: Ia5e846b471bc7d0089cb8a14cad483ac73647dfd
-
- 11 Jan, 2020 3 commits
-
-
Automerger Merge Worker authored
Change-Id: Id582bb12f305b67430c7694da45971ff348c3c91
-
Automerger Merge Worker authored
Change-Id: I7d5b336ff6057342be5c275a4d6c953ef37eb3ae
-
Elliott Hughes authored
am: ef3eb233 Change-Id: I45980aed2e73689a79078fa8e046546b6b8bd2ef
-
- 10 Jan, 2020 1 commit
-
-
Elliott Hughes authored
Remove this based on the explanation on https://github.com/ARM-software/optimized-routines/issues/23. Also document WANT_ERRNO=0 (which does make sense for us) based on https://github.com/ARM-software/optimized-routines/issues/16#issuecomment-572009659. Test: manually ran all the tests with a clang from the future Change-Id: I37393633416189854f349606c15d67b51cf0f813
-
- 09 Jan, 2020 1 commit
-
-
Szabolcs Nagy authored
clang does not support c99 fenv_access and may move fp operations out of conditional blocks causing unconditional fenv side-effects. Here if (cond) ix = f (x * 0x1p52); was transformed to ix_ = f (x * 0x1p52); ix = cond ? ix_ : ix; where x can be a huge negative value so the mul overflows. The added barrier should prevent such transformation by significantly increasing the cost of doing the mul unconditionally. Found by enh from google on android arm and aarch64 targets. Fixes github issue #16.
-
- 08 Jan, 2020 2 commits
-
-
Automerger Merge Worker authored
Change-Id: Ib4666ae6dafceef362817745e05f52d04c37499e
-
Automerger Merge Worker authored
Change-Id: I86441dd8bb4d5ddf3a2316d326e3142fa17932af
-